
setitimer:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400540 <_init>:
  400540:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400544:	910003fd 	mov	x29, sp
  400548:	9400003c 	bl	400638 <call_weak_fn>
  40054c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400550:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400560 <.plt>:
  400560:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400564:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf6fc>
  400568:	f947fe11 	ldr	x17, [x16, #4088]
  40056c:	913fe210 	add	x16, x16, #0xff8
  400570:	d61f0220 	br	x17
  400574:	d503201f 	nop
  400578:	d503201f 	nop
  40057c:	d503201f 	nop

0000000000400580 <signal@plt>:
  400580:	b0000090 	adrp	x16, 411000 <signal@GLIBC_2.17>
  400584:	f9400211 	ldr	x17, [x16]
  400588:	91000210 	add	x16, x16, #0x0
  40058c:	d61f0220 	br	x17

0000000000400590 <getpid@plt>:
  400590:	b0000090 	adrp	x16, 411000 <signal@GLIBC_2.17>
  400594:	f9400611 	ldr	x17, [x16, #8]
  400598:	91002210 	add	x16, x16, #0x8
  40059c:	d61f0220 	br	x17

00000000004005a0 <__libc_start_main@plt>:
  4005a0:	b0000090 	adrp	x16, 411000 <signal@GLIBC_2.17>
  4005a4:	f9400a11 	ldr	x17, [x16, #16]
  4005a8:	91004210 	add	x16, x16, #0x10
  4005ac:	d61f0220 	br	x17

00000000004005b0 <__gmon_start__@plt>:
  4005b0:	b0000090 	adrp	x16, 411000 <signal@GLIBC_2.17>
  4005b4:	f9400e11 	ldr	x17, [x16, #24]
  4005b8:	91006210 	add	x16, x16, #0x18
  4005bc:	d61f0220 	br	x17

00000000004005c0 <abort@plt>:
  4005c0:	b0000090 	adrp	x16, 411000 <signal@GLIBC_2.17>
  4005c4:	f9401211 	ldr	x17, [x16, #32]
  4005c8:	91008210 	add	x16, x16, #0x20
  4005cc:	d61f0220 	br	x17

00000000004005d0 <setitimer@plt>:
  4005d0:	b0000090 	adrp	x16, 411000 <signal@GLIBC_2.17>
  4005d4:	f9401611 	ldr	x17, [x16, #40]
  4005d8:	9100a210 	add	x16, x16, #0x28
  4005dc:	d61f0220 	br	x17

00000000004005e0 <printf@plt>:
  4005e0:	b0000090 	adrp	x16, 411000 <signal@GLIBC_2.17>
  4005e4:	f9401a11 	ldr	x17, [x16, #48]
  4005e8:	9100c210 	add	x16, x16, #0x30
  4005ec:	d61f0220 	br	x17

Disassembly of section .text:

00000000004005f0 <_start>:
  4005f0:	d280001d 	mov	x29, #0x0                   	// #0
  4005f4:	d280001e 	mov	x30, #0x0                   	// #0
  4005f8:	aa0003e5 	mov	x5, x0
  4005fc:	f94003e1 	ldr	x1, [sp]
  400600:	910023e2 	add	x2, sp, #0x8
  400604:	910003e6 	mov	x6, sp
  400608:	580000c0 	ldr	x0, 400620 <_start+0x30>
  40060c:	580000e3 	ldr	x3, 400628 <_start+0x38>
  400610:	58000104 	ldr	x4, 400630 <_start+0x40>
  400614:	97ffffe3 	bl	4005a0 <__libc_start_main@plt>
  400618:	97ffffea 	bl	4005c0 <abort@plt>
  40061c:	00000000 	.inst	0x00000000 ; undefined
  400620:	0040073c 	.word	0x0040073c
  400624:	00000000 	.word	0x00000000
  400628:	00400800 	.word	0x00400800
  40062c:	00000000 	.word	0x00000000
  400630:	00400880 	.word	0x00400880
  400634:	00000000 	.word	0x00000000

0000000000400638 <call_weak_fn>:
  400638:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf6fc>
  40063c:	f947f000 	ldr	x0, [x0, #4064]
  400640:	b4000040 	cbz	x0, 400648 <call_weak_fn+0x10>
  400644:	17ffffdb 	b	4005b0 <__gmon_start__@plt>
  400648:	d65f03c0 	ret
  40064c:	00000000 	.inst	0x00000000 ; undefined

0000000000400650 <deregister_tm_clones>:
  400650:	b0000080 	adrp	x0, 411000 <signal@GLIBC_2.17>
  400654:	91012000 	add	x0, x0, #0x48
  400658:	b0000081 	adrp	x1, 411000 <signal@GLIBC_2.17>
  40065c:	91012021 	add	x1, x1, #0x48
  400660:	eb00003f 	cmp	x1, x0
  400664:	540000a0 	b.eq	400678 <deregister_tm_clones+0x28>  // b.none
  400668:	90000001 	adrp	x1, 400000 <_init-0x540>
  40066c:	f9445021 	ldr	x1, [x1, #2208]
  400670:	b4000041 	cbz	x1, 400678 <deregister_tm_clones+0x28>
  400674:	d61f0020 	br	x1
  400678:	d65f03c0 	ret
  40067c:	d503201f 	nop

0000000000400680 <register_tm_clones>:
  400680:	b0000080 	adrp	x0, 411000 <signal@GLIBC_2.17>
  400684:	91012000 	add	x0, x0, #0x48
  400688:	b0000081 	adrp	x1, 411000 <signal@GLIBC_2.17>
  40068c:	91012021 	add	x1, x1, #0x48
  400690:	cb000021 	sub	x1, x1, x0
  400694:	9343fc21 	asr	x1, x1, #3
  400698:	8b41fc21 	add	x1, x1, x1, lsr #63
  40069c:	9341fc21 	asr	x1, x1, #1
  4006a0:	b40000a1 	cbz	x1, 4006b4 <register_tm_clones+0x34>
  4006a4:	90000002 	adrp	x2, 400000 <_init-0x540>
  4006a8:	f9445442 	ldr	x2, [x2, #2216]
  4006ac:	b4000042 	cbz	x2, 4006b4 <register_tm_clones+0x34>
  4006b0:	d61f0040 	br	x2
  4006b4:	d65f03c0 	ret

00000000004006b8 <__do_global_dtors_aux>:
  4006b8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4006bc:	910003fd 	mov	x29, sp
  4006c0:	f9000bf3 	str	x19, [sp, #16]
  4006c4:	b0000093 	adrp	x19, 411000 <signal@GLIBC_2.17>
  4006c8:	39412260 	ldrb	w0, [x19, #72]
  4006cc:	35000080 	cbnz	w0, 4006dc <__do_global_dtors_aux+0x24>
  4006d0:	97ffffe0 	bl	400650 <deregister_tm_clones>
  4006d4:	52800020 	mov	w0, #0x1                   	// #1
  4006d8:	39012260 	strb	w0, [x19, #72]
  4006dc:	f9400bf3 	ldr	x19, [sp, #16]
  4006e0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4006e4:	d65f03c0 	ret

00000000004006e8 <frame_dummy>:
  4006e8:	17ffffe6 	b	400680 <register_tm_clones>

00000000004006ec <sigroutine>:
  4006ec:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4006f0:	910003fd 	mov	x29, sp
  4006f4:	b9001fa0 	str	w0, [x29, #28]
  4006f8:	b9401fa0 	ldr	w0, [x29, #28]
  4006fc:	7100381f 	cmp	w0, #0xe
  400700:	54000080 	b.eq	400710 <sigroutine+0x24>  // b.none
  400704:	7100681f 	cmp	w0, #0x1a
  400708:	540000c0 	b.eq	400720 <sigroutine+0x34>  // b.none
  40070c:	1400000a 	b	400734 <sigroutine+0x48>
  400710:	90000000 	adrp	x0, 400000 <_init-0x540>
  400714:	9122c000 	add	x0, x0, #0x8b0
  400718:	97ffffb2 	bl	4005e0 <printf@plt>
  40071c:	14000005 	b	400730 <sigroutine+0x44>
  400720:	90000000 	adrp	x0, 400000 <_init-0x540>
  400724:	91234000 	add	x0, x0, #0x8d0
  400728:	97ffffae 	bl	4005e0 <printf@plt>
  40072c:	d503201f 	nop
  400730:	d503201f 	nop
  400734:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400738:	d65f03c0 	ret

000000000040073c <main>:
  40073c:	a9b97bfd 	stp	x29, x30, [sp, #-112]!
  400740:	910003fd 	mov	x29, sp
  400744:	b0000080 	adrp	x0, 411000 <signal@GLIBC_2.17>
  400748:	91013000 	add	x0, x0, #0x4c
  40074c:	528000a1 	mov	w1, #0x5                   	// #5
  400750:	b9000001 	str	w1, [x0]
  400754:	97ffff8f 	bl	400590 <getpid@plt>
  400758:	2a0003e1 	mov	w1, w0
  40075c:	90000000 	adrp	x0, 400000 <_init-0x540>
  400760:	9123c000 	add	x0, x0, #0x8f0
  400764:	97ffff9f 	bl	4005e0 <printf@plt>
  400768:	90000000 	adrp	x0, 400000 <_init-0x540>
  40076c:	911bb000 	add	x0, x0, #0x6ec
  400770:	aa0003e1 	mov	x1, x0
  400774:	528001c0 	mov	w0, #0xe                   	// #14
  400778:	97ffff82 	bl	400580 <signal@plt>
  40077c:	90000000 	adrp	x0, 400000 <_init-0x540>
  400780:	911bb000 	add	x0, x0, #0x6ec
  400784:	aa0003e1 	mov	x1, x0
  400788:	52800340 	mov	w0, #0x1a                  	// #26
  40078c:	97ffff7d 	bl	400580 <signal@plt>
  400790:	d2800020 	mov	x0, #0x1                   	// #1
  400794:	f90033a0 	str	x0, [x29, #96]
  400798:	f90037bf 	str	xzr, [x29, #104]
  40079c:	d2800020 	mov	x0, #0x1                   	// #1
  4007a0:	f9002ba0 	str	x0, [x29, #80]
  4007a4:	f9002fbf 	str	xzr, [x29, #88]
  4007a8:	9100c3a1 	add	x1, x29, #0x30
  4007ac:	910143a0 	add	x0, x29, #0x50
  4007b0:	aa0103e2 	mov	x2, x1
  4007b4:	aa0003e1 	mov	x1, x0
  4007b8:	52800000 	mov	w0, #0x0                   	// #0
  4007bc:	97ffff85 	bl	4005d0 <setitimer@plt>
  4007c0:	f90013bf 	str	xzr, [x29, #32]
  4007c4:	d2942400 	mov	x0, #0xa120                	// #41248
  4007c8:	f2a000e0 	movk	x0, #0x7, lsl #16
  4007cc:	f90017a0 	str	x0, [x29, #40]
  4007d0:	f9000bbf 	str	xzr, [x29, #16]
  4007d4:	d2942400 	mov	x0, #0xa120                	// #41248
  4007d8:	f2a000e0 	movk	x0, #0x7, lsl #16
  4007dc:	f9000fa0 	str	x0, [x29, #24]
  4007e0:	9100c3a1 	add	x1, x29, #0x30
  4007e4:	910043a0 	add	x0, x29, #0x10
  4007e8:	aa0103e2 	mov	x2, x1
  4007ec:	aa0003e1 	mov	x1, x0
  4007f0:	52800020 	mov	w0, #0x1                   	// #1
  4007f4:	97ffff77 	bl	4005d0 <setitimer@plt>
  4007f8:	14000000 	b	4007f8 <main+0xbc>
  4007fc:	00000000 	.inst	0x00000000 ; undefined

0000000000400800 <__libc_csu_init>:
  400800:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400804:	910003fd 	mov	x29, sp
  400808:	a901d7f4 	stp	x20, x21, [sp, #24]
  40080c:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf6fc>
  400810:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf6fc>
  400814:	91374294 	add	x20, x20, #0xdd0
  400818:	913722b5 	add	x21, x21, #0xdc8
  40081c:	a902dff6 	stp	x22, x23, [sp, #40]
  400820:	cb150294 	sub	x20, x20, x21
  400824:	f9001ff8 	str	x24, [sp, #56]
  400828:	2a0003f6 	mov	w22, w0
  40082c:	aa0103f7 	mov	x23, x1
  400830:	9343fe94 	asr	x20, x20, #3
  400834:	aa0203f8 	mov	x24, x2
  400838:	97ffff42 	bl	400540 <_init>
  40083c:	b4000194 	cbz	x20, 40086c <__libc_csu_init+0x6c>
  400840:	f9000bb3 	str	x19, [x29, #16]
  400844:	d2800013 	mov	x19, #0x0                   	// #0
  400848:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  40084c:	aa1803e2 	mov	x2, x24
  400850:	aa1703e1 	mov	x1, x23
  400854:	2a1603e0 	mov	w0, w22
  400858:	91000673 	add	x19, x19, #0x1
  40085c:	d63f0060 	blr	x3
  400860:	eb13029f 	cmp	x20, x19
  400864:	54ffff21 	b.ne	400848 <__libc_csu_init+0x48>  // b.any
  400868:	f9400bb3 	ldr	x19, [x29, #16]
  40086c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400870:	a942dff6 	ldp	x22, x23, [sp, #40]
  400874:	f9401ff8 	ldr	x24, [sp, #56]
  400878:	a8c47bfd 	ldp	x29, x30, [sp], #64
  40087c:	d65f03c0 	ret

0000000000400880 <__libc_csu_fini>:
  400880:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400884 <_fini>:
  400884:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400888:	910003fd 	mov	x29, sp
  40088c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400890:	d65f03c0 	ret
